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超长指令字?。VLIW? Very Long Instruction Word?
VLIW是简化处理器的最新方法。VLIW is the latest way to simplify processors.
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相反,vliw芯片将此负担的大部分转交给了编译器。Instead, VLIW chips shift more of that burden onto compilers.
数据处理单元是结构的核心,采用VLIW加SIMD向量结构。The data processing unit using VLIW and SIMD vector structure is the key of the architecture.
之间的辩论的优点超标和VLIW指令不仅限于优良药房工作规范宇宙。The debate between the merits of superscalar and VLIW is not only restricted to the GPP universe.
今后几年中,至少你的部分软件肯定会运行在vliw芯片上。Within a few years, it's certain that at least some of your software will be running on VLIW chips.
我们知道,一个关键区别在于超标量和超长指令字中的硬件和软件的复杂性分别。We know that a key difference between superscalar and VLIW lies in the hardware and software complexity respectively.
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与RISC和CISC芯片相比,VLIW芯片的成本低、功耗低、并能获得更高的性能。VLIW chips can cost less, burn less power and achieve significantly higher performance than comparable RISC and CISC chips.
VLIW芯片不需要超级标量芯片为运行时协调并行处理所采用的复杂控制电路。VLIW chips don't need most of the complex control circuitry that superscalar chips must use to coordinate parallel execution at runtime.
对于VLIW机器来讲,由于机器性能与编译器的设计和实现有很大的关系,指令调度就显得尤为重要。It is especially important to VLIW architecture as for the performance of the machine has something to do with the design and realization of the compiler.
结合指令集模拟器、汇编器以及调试器,设计了一个面向VLIW处理器的辅助程序优化环境。Combined the ISS with an assembler and a debugger, a software optimization development environment for block cipher specific VLIW processor is constructed.
本文讨论这样一款DSP,它采用分簇的VLIW体系结构,能够在单个时钟周期同时执行多个操作。In this thesis we discuss such a DSP, which uses a clustered VLIW architecture and can perform multiple operations simultaneously during a single clock cycle.
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针对编译器系统设计和编译中的低功耗优化,基于可重定向编译器,实现在编译器后端对VLIW指令总线进行功耗优化的策略。With the design of complier system and optimization for its low-power in compiling, the low-power optimization strategy for VLIW instruction bus is implemented in the compiler backend.
从实验的结果可以看出,这种结构不仅能满足媒体处理器的目标要求,而且对VLIW结构的媒体处理器有重要的意义。Judged by the result of experiments, this RF configuration is not only satisfied with the requirements of media processors, but also well applied to media processors with VLIW architecture.