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视频数据流通过该控制器接收，然后存入片外SDRAM中。Video data stream is stored into SDRAM via It's controller.

经由字幕解码器，字幕可以被存入片外SDRAM。By the subtitle decoder, the subtitles will be held in SDRAM in the receiver.

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CPLD电路设计采用图像传感器的输出时钟触发SDRAM写过程。The design of CPLD has adopted the output clock of image sensor to write SDRAM.

介绍基于FPGA的SDRAM控制器的设计及其在视频采集系统中的应用。In this paper, a SDRAM controller for video capture system has been implemented in FPGA.

我取消了在那里的两个SDRAM芯片，取而代之的是芯片的A330飞机在他们的同类。I removed the two SDRAM chips in there and replaced them with the same kind of chips as in the A330.

设计了采用SDRAM进行图像缓存的方法，实现高速高分辨率图像的采集。The image is buffered using SDRAM and the high-speed high-resolution image-acquisition has been implemented.

介绍了SDRAM及其基于FPGA的通用控制器在PDP视频存储系统中的应用。The paper introduces the application of SDRAM and its general controller based on FPGA in the PDP video storage system.

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参数表模块主要实现SDRAM存储器的控制器接口，用于图像处理时读取参数信息。Parameter table module is the SDRAM memory controller interface for reading parameter information when image processing.

DDR2内存不能直接识别主端口的请求命令，必须经由内存控制器处理后才能执行。The controller is used to translate requests coming from host port because DDR2 SDRAM could not execute these com- mands directly.

在此系统之上实现了计算机串口与SDRAM之间的相互通信。The interface between SDRM and FPGA was designed, and mutual communication between the serial port of the computer and SDRAM was realized.

然后探讨了采用什么标准去评估指令执行效率的提高，最后通过实验数据得到对SDRAM指令FIFO的性能的评估。This method can be used to evaluate the improved performance experimental data were to evaluate the performance of SDRAM instruction FIFO.

本文所设计的SDRAM控制器功能模块具备中高速的访问能力，完成SDRAM的通用功能。The SDRAM controller function module designed in this paper accesses the SDRAM with medium-high speed and accomplishes the general function.

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本论文的嵌入式硬件环境，包括CPU的外围时钟电路，复位电路，存储器单元，LCD模块，触摸屏，键盘，FLASH，SDRAM，网络接口等部分。The embedded system in this thesis include CPU , memory part , LCD part, touching screen, keyboard, FLASH, SDRAM and internet interface and so on.

由于图像采集模块获取的图像数据量十分可观，因此本系统采用一块32MB的SDRAM完成数据的存储。Then FPGA extracts effective luminance signal from the digital signal. The image storage module uses a 32MB SDRAM to store the considerable digital data.

前者接收外设慢速数据流，经处理后写入到SDRAM，后者读取SDRAM中数据，为外围高速设备提供高速数据流。The exporter using an user defined data package provides high speed data stream by spells for the high speed peripheral equipments which got from the SDRAM.

实现用SDRAM运行nios，同时用SRAM保存摄像头数据，基于多相结构的信道化接收机，随机调制信号下的模拟ppm。Implemented with SDRAM run nios, while saving camera data SRAM, Channelized receiver based on multi-phase structure, Random ppm modulated analog signal unde.

据富士通称，其消费电子产品用FCRAM相比普通RAM不仅接口功耗更低，而且数据传输率也更快。According to Fujitsu, FCRAM for consumer electronics devices offers a low power SDRAM interface and enables high-speed data transfer with low power consumption.

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在详细分析了SDRAM和DDR存储器结构的基础上，提出了MBM的设计思想，并给出了其实现方法和实际波形。Based on the analysis of the SDRAM and DDR memory architecture, this paper presents the design principals of MBM and offers the implementation and the actual waveforms.

用大容量动态存储器以及双DSP硬件处理系统实现了大量数据缓存和实时信号处理，从而完成了对微弱信号截获的分析。In this paper, a big capacity SDRAM matrix and dual-DSPs hardware are studied based on the mass data memory and processing in real time for the weak singal intercept and analysis.