Please help us improve the quality of example sentences! Edit on Github

针对低功耗测试问题，本文提出一种新的低功耗混合BIST方案。Aiming at Low-Power BIST, a novel low-power BIST scheme was presented.

本论文主要讨论的是可编程逻辑器件FPGA的BIST理论、方法和应用。BIST theory, solution and application in FPGA are studied in this thesis.

Other words in sentence

区段加权乱数自我测试的电路非常小，而且不会随著待测电路变大而有大幅度的增加。The SWR- BIST circuitry is very small and it grows slowly with the CUT size.

本论文对数字系统基于扫描的BIST技术进行了深入研究。In this thesis, we research on scan-based BIST techniques of digital systems.

你负责歌词。那么你的灵感从何而来呢？Du bist für die Lyrics verantwortlich. Woher nimmst du eigentlich deine Inspiration?

系统级可测性设计主要是将存储器BIST与ARM核的边界扫描测试相结合。SRAM BIST is also combined with ARM core's boundary scan testing during system level DFT.

文中对SOC的设计特点及其BIST中的混合模式测试进行了探讨。In this paper, the SOC design characteristics and mixed-mode testing of the BIST were discussed.

Other words in sentence

本文针对线性模拟电路，提出了一种基于系统状态变量的BIST方法。For the linear analog circuits, a BIST method based on the system′s state variables is presented.

电路结构简单可行，提供的相应算法也易于实现。The BIST structure circuit is simple and feasible, and the corresponding algorithm is easy to achieve.

BIST控制器不仅可以执行传统的存储器测试算法，而且可以生成用于逻辑模块的测试向量。The BIST controller can not only perform traditional memory test algorithms but also generates test patterns required for the logic part.

分析了这些问题的影响，提出了相应措施，并介绍了结合BIST技术进行逻辑簇测试的方法。The impacts of these problems were analyzed, and the corresponding solutions were presented, at the same time, a test technology combining with BIST was introduced.

文中首先介绍了内建自测试的实现原理，在此基础上以八位行波进位加法器为例，详细介绍了组合电路内建自测试的设计过程。The BIST of the principle of achieving is introduced first in this paper, then take the 8-bit ripple carry adder as an example, describes the design process of BIST.

Other words in sentence

通过添加测试引脚、设计专用测试模式，内建自测试等方法有效的解决了该芯片电路的功能测试和电气性能测试。The top metal test pad, special test mode and BIST are adopted in the IC circuits to solve the IC test problem about the chip function test and electric character test.

使用受控LFSR可以跳过伪随机测试序列中对故障覆盖率没有贡献的测试矢量，从而达到减少测试矢量长度，缩短测试时间的目的。BIST with a controlled LFSR can skip pseudo-random test vectors not contributing to the fault coverage, thus the length of test vectors and the time of test are reduced.

其中测试点设置是软件内建自测试系统的核心模块之一，主要借助程序插装技术收集动态测试信息和控制程序流程。Checkpoint mounting, which is one of the kernel modules of BIST system for software, is used for collecting dynamic test information and controlling the executing path of software.

由于累加器在VLSI电路中普遍存在，本文的复用设计节省硬件成本，可有效用于强健时延故障的测试序列生成。As accumulators are available in many VLSI circuits, such reuse design can save much hardware cost and be adopted effectively as BIST test pattern generator for robustly delay fault testing.

本文给出了一种新型的瞬态电流测试BIST测试生成器设计方案，该设计可以产生所需要的测试向量对，同时具有硬件开销小的优点。This article gives a new BIST test generator design for transient current testing, this design not only produces needed test vector pairs but also has an advantage of low hardware overheads.

Other words in sentence

详细分析了嵌入式存储器的典型内建自测试方案，讨论了在内建自测试电路中增加内建冗馀分析、内建故障诊断和内建白修复等功能的可行性。The typical BIST schemes for embedded memories are analyzed. The feasibility of adding built-in redundancy analysis, built-in self-diagnosis and built-in self-repair into BIST circuits is analyzed.

为了减少测试向量的存储需求，提出一种基于扭环计数器作为测试向量产生器的横向和竖向测试数据压缩的BIST方案。In order to reduce the storage requirements for the test patterns, a vertical and horizontal test data compression BIST scheme based on the test pattern generation of twisted-ring counter is proposed.